Freescale Semiconductor MCF5480 - Manual (Page 358)

MCF548x Reference Manual, Rev. 3
13-6 Freescale Semiconductor
The IPR is a read-only register, so any attempted write to this register is ignored. Bit 0 is not implemented
and reads as a zero.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R INT[63:48]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R INT[47:32]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reg
Addr
MBAR + 0x700
Figure 13-1. Interrupt Pending Register High (IPRH)
Table 13-3. IPRH Field Descriptions
Bits Name Description
31–0 INT[63:32] Interrupt pending. Each bit corresponds to an interrupt source. The corresponding IMRH bit
determines whether an interrupt condition can generate an interrupt. At every system clock, the
IPRH samples the signal generated by the interrupting source. The corresponding IPRH bit
reflects the state of the interrupt signal even if the corresponding IMRH bit is set.
0 The corresponding interrupt source does not have an interrupt pending
1 The corresponding interrupt source has an interrupt pending
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R INT[31:16]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R INT[15:1] 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Reg
Addr
MBAR + 0x704
Figure 13-2. Interrupt Pending Register Low (IPRL)