3 4-bit pclrr_x registers, 4 5-bit pclrr_fbcs registers, Figure 15-19 – Freescale Semiconductor MCF5480 User Manual
Page 392: Figure 15-20

MCF548x Reference Manual, Rev. 3
15-20
Freescale Semiconductor
15.3.2.4.3
4-Bit PCLRR_x Registers
The 4-bit PCLRR_x registers are the clear output data registers for PDMAn (PCLRR_DMA) and
PFECI2Cn (PCLRR_FECI2C).
displays the 4-bit PCLRR_x registers.
15.3.2.4.4
5-Bit PCLRR_FBCS Registers
The 5-bit PCLRR_FBCS register is the clear output data register for PFBCSn.
5-bit PCLRR_FBCS register.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
PCLRRx4
PCLRRx3
PCLRRx2
PCLRRx1
PCLRRx0
Reset
0
0
0
0
0
0
0
0
Reg
Addr
MBAR + 0xA39 (PCLRR_PCIBG) and 0xA3A (PCLRR_PCIBR)
Figure 15-19. 5-Bit PCIBG and PCIBR Clear Output Data Register
Table 15-21. 5-Bit PCLRR_PCIBG and PCLRR_PCIBR Field Descriptions
Bits
Name Description
7–5
—
Reserved, should be cleared
4–0
PCLRRxn
PCLRR_PCIBG and PCLRR_PCIBR clear output data registers
0 Corresponding PODR_PCIGNT or PODR_PCIBR bit is cleared
1 No effect
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
PCLRRx3
PCLRRx2
PCLRRx1
PCLRRx0
Reset
0
0
0
0
0
0
0
0
Reg
Addr
MBAR + 0xA32 (PCLRR_DMA) and 0xA38 (PCLRR_FECI2C)
Figure 15-20. 4-Bit DMA and FECI2C Clear Output Data Registers
Table 15-22. 4-Bit PCLRR_DMA and PCLRR_FECI2C Field Descriptions
Bits
Name Description
7–4
—
Reserved, should be cleared
3–0
PCLRRxn
PCLRR_DMA and PCLRR_FECI2C clear output data registers
0 Corresponding PODR_DMA or PODR_FECI2C bit is cleared
1 No effect