5 acknowledge, Acknowledge -10 – Freescale Semiconductor MCF5480 User Manual
Page 864

MCF548x Reference Manual, Rev. 3
28-10
Freescale Semiconductor
Data can be changed only while SCL is low and must be held stable while SCL is high, as
shows. SCL is pulsed once for each data bit, with the msb being sent first. The receiving device must
acknowledge each byte by pulling SDA low at the ninth clock; therefore, a data byte transfer takes nine
).
Figure 28-9. Data Transfer
28.4.5
Acknowledge
The transmitter releases the SDA line high during the acknowledge clock pulse as shown in
.
The receiver pulls down the SDA line during the acknowledge clock pulse so that it remains stable low
during the high period of the clock pulse.
If a slave-receiver does not acknowledge the byte transfer, the SDA must be left high by the slave. The
master then can generate a STOP condition to abort the transfer or generate a START signal (repeated start,
and
, and discussed in
Section 28.4.6, “Repeated Start
calling sequence.
If a master-receiver does not acknowledge the slave transmitter after a byte transmission, it means end of
data to the slave, so the slave releases the SDA line for the master to generate a STOP or a START signal
Figure 28-10. Acknowledgement by Receiver
1
2
3
4
5
6
7
8
9
5
6
7
8
9
SCL
4
3
2
1
Bit6
Bit4 Bit3 Bit2 Bit1
Bit5
SDA
Bit7
Bit0
Bit6
Bit4 Bit3 Bit2 Bit1
Bit5
Bit0
Bit7
START
Signal
ACK from
Receiver
STOP
No
ACK
Bit
Data Byte
Slave Address
R/W
Signal
Interrupt Bit Set
(Byte Complete)
SCL Held Low while
Interrupt is Serviced
5
6
7
8
9
SCL
4
3
2
1
Bit6
Bit4 Bit3 Bit2 Bit1
Bit5
SDA by Transmitter
Bit7
Bit0
START Signal
R/W
SDA by Receiver