6 instruction set summary, 1 additions to the instruction set architecture, Instruction set summary -19 – Freescale Semiconductor MCF5480 User Manual
Page 123: Additions to the instruction set architecture -19, Microprocessors, Table 3-6, Summarizes
Instruction Set Summary
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor
3-19
3.6
Instruction Set Summary
The ColdFire instruction set is a simplified version of the M68000 instruction set. The removed
instructions include BCD, bit field, logical rotate, decrement and branch, and integer multiply with a 64-bit
result.
”
lists notational conventions used throughout this manual.
3.6.1
Additions to the Instruction Set Architecture
The original ColdFire ISA was derived from M68000 Family opcodes based on extensive analysis of
embedded application code. After the first ColdFire compilers were created, developers identified ISA
additions that would enhance both code density and overall performance. Additionally, as users
implemented ColdFire-based designs into a wide range of embedded systems, they identified frequently
used instruction sequences that could be improved by creating new instructions. This observation was
especially prevalent in environments that used substantial amounts of assembly language code.
The original ISA minimized support for instructions referencing byte and word operands. MOVE.B and
MOVE.W were fully supported; otherwise, only CLR (clear) and TST (test) supported these data types.
Based on input from compiler writers and system users, a set of instruction enhancements was proposed
to address the following:
Table 3-6. ColdFire Effective Addressing Modes
Addressing Modes
Syntax
Mode
Field
Reg.
Field
Category
Data
Memory
Control
Alterable
Register direct
Data
Address
Dn
An
000
001
reg. no.
reg. no.
X
—
—
—
—
—
X
X
Register indirect
Address
Address with
Postincrement
Address with
Predecrement
Address with
Displacement
(An)
(An)+
–(An)
(d
16
, An)
010
011
100
101
reg. no.
reg. no.
reg. no.
reg. no.
X
X
X
X
X
X
X
X
X
—
—
X
X
X
X
X
Address register indirect with
scaled index
8-bit displacement
(d
8
, An,
Xi*SF)
110
reg. no.
X
X
X
X
Program counter indirect
with displacement
(d
16
, PC)
111
010
X
X
X
—
Program counter indirect with
scaled index
8-bit displacement
(d
8
, PC,
Xi*SF)
111
011
X
X
X
—
Absolute data addressing
Short
Long
(xxx).W
(xxx).L
111
111
000
001
X
X
X
X
X
X
—
—
Immediate
#
111
100
X
X
—
—