Freescale Semiconductor MCF5480 - Manual (Page 36)

MCF548x Reference Manual, Rev. 3
xxxvi Freescale Semiconductor
Contents
Paragraph
Number
Title
Page
Number
29.2.2.3 USB Descriptor RAM Control Register (DRAMCR) ........................................ 29-12
29.2.2.4 USB Descriptor RAM Data Register (DRAMDR) ............................................ 29-13
29.2.2.5 USB Interrupt Status Register (USBISR) ........................................................... 29-14
29.2.2.6 USB Interrupt Mask Register (USBIMR) .......................................................... 29-15
29.2.2.7 USB Application Interrupt Status Register (USBAISR) .................................... 29-16
29.2.2.8 USB Application Interrupt Mask Register (USBAIMR) .................................... 29-17
29.2.2.9 Endpoint Info Register (EPINFO) ...................................................................... 29-18
29.2.2.10 USB Configuration Value Register (CFGR) ...................................................... 29-19
29.2.2.11 USB Configuration Attribute Register (CFGAR) .............................................. 29-19
29.2.2.12 USB Device Speed Register (SPEEDR) ............................................................. 29-20
29.2.2.13 USB Frame Number Register (FRMNUMR) ..................................................... 29-21
29.2.2.14 USB Endpoint Transaction Number Register (EPTNR) .................................... 29-21
29.2.2.15 USB Application Interface Update Register (IFUR) .......................................... 29-22
29.2.2.16 USB Configuration Interface Register (IFRn) .................................................... 29-22
29.2.3 USB Counter Registers ........................................................................................... 29-23
29.2.3.1 USB Packet Passed Count Register (PPCNT) .................................................... 29-23
29.2.3.2 USB Dropped Packet Counter Register (DPCNT) ............................................. 29-24
29.2.3.3 USB CRC Error Counter Register (CRCECNT) ................................................ 29-24
29.2.3.4 USB Bitstuffing Error Counter Register (BSECNT) .......................................... 29-24
29.2.3.5 USB PID Error Counter Register (PIDECNT) ................................................... 29-25
29.2.3.6 USB Framing Error Counter Register (FRMECNT) .......................................... 29-25
29.2.3.7 USB Transmitted Packet Counter Register (TXPCNT) ..................................... 29-26
29.2.3.8 USB Counter Overflow Register (CNTOVR) .................................................... 29-26
29.2.4 Endpoint Context Registers .................................................................................... 29-27
29.2.4.1 Endpoint n Attribute Control Register (EP0ACR, EP n OUTACR, EP n INACR) 29-27
29.2.4.2 Endpoint n Max Packet Size Register (EP0MPSR, EPnOUTMPSR, EPnINMPSR)
......................................................................................................................... 29-28
29.2.4.3 Endpoint n Interface Number Register (EP0IFR, EP n OUTIFR, EP n INIFR) .... 29-29
29.2.4.4 Endpoint n Status Register (EP0SR, EPnOUTSR, EPnINSR) ........................... 29-30
29.2.4.5 bmRequest Type Register (BMRTR) ................................................................. 29-31
29.2.4.6 bRequest Type Register (BRTR) ........................................................................ 29-32
29.2.4.7 wValue Register (WVALUER) .......................................................................... 29-32
29.2.4.8 wIndex Register (WINDEXR) ........................................................................... 29-33
29.2.4.9 wLength Register (WLENGTHR) ...................................................................... 29-33
29.2.4.10 Endpoint n Sync Frame Register (EP n OUTSFR, EP n INSFR) .......................... 29-33
29.2.5 USB Endpoint FIFO Registers ............................................................................... 29-34
29.2.5.1 USB Endpoint n Status and Control Register (EP n STAT) ................................ 29-34
29.2.5.2 USB Endpoint n Interrupt Status Register (EP n ISR) ......................................... 29-35
29.2.5.3 USB Endpoint n Interrupt Mask Register (EPnIMR) ......................................... 29-37
29.2.5.4 USB Endpoint n FIFO RAM Configuration Register (EPnFRCFGR) .............. 29-38
29.2.5.5 USB Endpoint n FIFO Data Register (EPnFDR) ............................................... 29-39