Freescale Semiconductor MCF5480 - Manual (Page 814)

MCF548x Reference Manual, Rev. 3
26-52 Freescale Semiconductor
26.7.2.5 SIR Mode
Here is a sample configuration sequence in SIR mode.
6 PSCRFAR 00F0 ALARM[8:0]=0F0 Request is asserted if # of data >= 240
7 PSCTFAR 00F0 ALARM[8:0]=0F0 Request is asserted if # of empty >= 240
8 PSCCR 05 TC=01 Enable transmitter
RC=01 Enable receiver
Table 26-44. A Sample Initialization Sequence for SIR Mode
Step
No.
Register Value Details Meaning
1 PSCSICR 04 SIM[2:0]=100 SIR mode
2 PSCCSR DD RCS[3:0]=1101 Receiver baud rate is made from PSC timer
TCS[3:0]=1101 Transmitter baud rate is made from PSC timer
3 PSCCTUR 00 CT[15:0]=108 (dec) Divide sys_clk by 108. If f(sys_clk) = 33.3333 MHz,
baud rate is 9600 bps.
PSCCTLR 6C
4 PSCCR 20 MISC=010 Reset receiver and RxFIFO
30 MISC=011 Reset transmitter and TxFIFO
40 MISC=100 Reset all error status
10 MISC=001 Reset MR pointer
5 PSCIMR 0300 IPC=0 Disable input port change interrupt
DB=0 Disable delta break interrupt
RxRDY or FU=1 Enable receiver interrupt/request
TxRDY=1 Enable transmitter interrupt/request
6 PSCACR 00 IEC1=0 Disable state change of DCD
IEC0=0 Disable state change of PSCnCTS
7 PSCMR1 33 RxRTS=0 Receiver has no effect on PSCnRTS
RxIRQ=0 Receiver interrupt is from RxRDY (one byte)
ERR=1 (fixed) Block error mode
PM[1:0]=10, PMT=0 No parity
BC[1:0]=11 8 bit
Table 26-43. A Sample Initialization Sequence for AC97 Mode (Continued)
Step
No.
Register Value Details Meaning