Freescale Semiconductor MCF5480 - Manual (Page 371)

Memory Map/Register Definition
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 14-5
14.3.2.5 Edge Port Pin Data Register (EPPDR)
14.3.2.6 Edge Port Flag Register (EPFR)
Table 14-5. EPDR Field Descriptions
Bits Name Description
7–1 EPDx Edge port data bits. Data written to EPDR is stored in an internal register; if any pin of the port is
configured as an output, the bit stored for that pin is driven onto the pin. Reading EDPR returns
the data stored in the register. Reset sets EPD7-EPD1.
0 — Reserved, should be cleared.
7 6 5 4 3 2 1 0
R EPPD7 EPPD6 EPPD5 EPPD4 EPPD3 EPPD2 EPPD1 0
W
Reset Current pin state 0
Reg
Addr
MBAR + 0xF09
Figure 14-6. EPORT Port Pin Data Register (EPPDR)
Table 14-6. EPPDR Field Descriptions
Bits Name Description
7–1 EPPDx Edge port pin data bits. The read-only EPPDR reflects the current state of the EPORT pins
IRQ7–IRQ1. Writing to EPPDR has no effect, and the write cycle terminates normally. Reset does
not affect EPPDR.
0 — Reserved, should be cleared.
7 6 5 4 3 2 1 0
R EPF7 EPF6 EPF5 EPF4 EPF3 EPF2 EPF1 0
W
Reset 0 0 0 0 0 0 0 0
Reg
Addr
MBAR + 0xF0C
Figure 14-7. EPORT Port Flag Register (EPFR)