Freescale Semiconductor MCF5480 - Manual (Page 756)

MCF548x Reference Manual, Rev. 3
25-4 Freescale Semiconductor
25.2.2 Register Descriptions
25.2.2.1 Comm Timer Configuration Register (CTCRn)—Fixed Timer Channel
This register provides programming options for each fixed timer channel. These channels can be
programmed to be in initiator mode or in baud clock generator mode.
Table 25-2. Timer Memory Map
Offset
(MBAR +)
Name Byte 0 Byte 1 Byte 2 Byte 3 Access
0x7F00 Comm Timer Control Register 0
—Fixed Timer Channel
CTCR0 R/W
0x7F04 Comm Timer Control Register 1
—Fixed Timer Channel
CTCR1 R/W
0x7F08 Comm Timer Control Register 2
—Fixed Timer Channel
CTCR2 R/W
0x7F0C Comm Timer Control Register 3
—Fixed Timer Channel
CTCR3 R/W
0x7F10 Comm Timer Control Register 4
—Variable Timer Channel
CTCR4 R/W
0x7F14 Comm Timer Control Register 5
—Variable Timer Channel
CTCR5 R/W
0x7F18 Comm Timer Control Register 6
—Variable Timer Channel
CTCR6 R/W
0x7F1C Comm Timer Control Register 7
—Variable Timer Channel
CTCR7 R/W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R I 0 0 0 0 0 0 IM M PCT S
W
Reset 0 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R CRV
W
Reset 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Reg
Addr
MBAR + 0x7F00 (CTCR0); + 0x7F04 (CTCR1); + 0x7F08 (CTCR2); + 0x7F0C (CTCR3)
Figure 25-4. Comm Timer Configuration Register (CTCRn)—Fixed Timer Channel