Freescale Semiconductor MCF5480 - Manual (Page 721)

MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 24-1
Chapter 24
Multichannel DMA
24.1 Introduction
The MCF548x’s direct memory access controller (DMA) module provides a flexible and efficient means
to move blocks of data within the system. The multichannel DMA controller reduces the workload on the
microprocessor, allowing it to continue execution of system software. The DMA microcode engine is
tailored to efficiently transfer data across the internal bus architecture to memory and peripheral devices.
Access to the functionality of the multichannel DMA is provided using a software API. The “Multichannel
DMA API User’s Guide” (MCDMAAPIUG) contains a full description of the software API for use with
the DMA. Please refer to that document for software driver information.
24.1.1 Block Diagram
Figure 24-1 shows the internal block structure and data paths within the multichannel DMA module. A
very brief description of each block follows.
Figure 24-1. DMA Block Diagram
Read Arbiter
Priority Task
Decode (PTD)
Read Engine Write Engine Arbitration
MDE
TaskBAR
Comm Bus
Write Arbiter
LURC
Debug Unit
System Bus
Interface
Line Buffers
SRAM Interface
Data In
ADS
32 Kbyte
SRAM
DMA
Controller
XL Bus
Data Out
IP Bus
System