4 data format summary, 1 data organization in registers, 1 integer data format organization in registers – Freescale Semiconductor MCF5480 User Manual
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Data Format Summary
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor
3-15
3.4
Data Format Summary
lists the operand data formats. Integer operands can reside in registers, memory, or instructions.
The operand size is either explicitly encoded in the instruction or implicitly defined by the instruction
operation.
3.4.1
Data Organization in Registers
The following sections describe data organization in data, address, and control registers.
“Floating-Point Data Formats,”
describes floating-point formatting.
3.4.1.1
Integer Data Format Organization in Registers
shows the integer format for data registers. Each integer data register is 32 bits wide. Byte and
word operands occupy the lower 8- and 16-bit portions of integer data registers, respectively. Longword
operands occupy the entire 32 bits of integer data registers. A data register that is either a source or
destination operand only uses or changes the appropriate lower 8 or 16 bits in byte or word operations,
respectively. The remaining high-order portion does not change. Note that the least-significant bit is bit 0
for all data types, whereas the msbs for longword integer is bit 31, the msb of a word integer is bit 15, and
the msb of a byte integer is bit 7.
FPL6
0x81D
No
32 lsbs of floating-point data register 6
FPU7
0x81E
No
32 msbs of floating-point data register 7
FPL7
0x81F
No
32 lsbs of floating-point data register 7
FPIAR
0x821
No
Floating-point instruction address register
FPSR
0x822
No
Floating-point status register
FPCR
0x824
No
Floating-point control register
Local Memory and Module Control Registers
RAMBAR0
0xC04
Yes
RAM base address register 0
RAMBAR1
0xC05
Yes
RAM base address register 1
MBAR
0xC0F
Yes
Primary module base address register (not a core
register)
Table 3-5. Integer Data Formats
Operand Data Format
Size
Bit
1 bit
Byte integer
8 bits
Word integer
16 bits
Longword integer
32 bits
Table 3-4. ColdFire CPU Registers (Continued)
Name
CPU Space (Rc)
Written with MOVEC
Register Name