Freescale Semiconductor MCF5480 - Manual (Page 357)

Memory Map/Register Descriptions
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 13-5
13.2.1 Register Descriptions
13.2.1.1 Interrupt Pending Registers (IPRH, IPRL)
The IPRH and IPRL registers, Figure 13-1 and Figure 13-2 , are each 32 bits in size and provide a bit map
for each interrupt request to indicate if there is an active request for the given source (1 = active request,
0 = no request). The state of the interrupt mask register does not affect the IPR. The IPR is cleared by reset.
0x740 Interrupt Control Registers Reserved ICR01 ICR02 ICR03 R
0x744 ICR04 ICR05 ICR06 ICR07 R
0x748 ICR08 ICR09 ICR10 ICR11 R/W
0x74c ICR12 ICR13 ICR14 ICR15 R/W
0x750 ICR16 ICR17 ICR18 ICR19 R/W
0x754 ICR20 ICR21 ICR22 ICR23 R/W
0x758 ICR24 ICR25 ICR26 ICR27 R/W
0x75C ICR28 ICR29 ICR30 ICR31 R/W
0x760 ICR32 ICR33 ICR34 ICR35 R/W
0x764 ICR36 ICR37 ICR38 ICR39 R/W
0x768 ICR40 ICR41 ICR42 ICR43 R/W
0x76C ICR44 ICR45 ICR46 ICR47 R/W
0x770 ICR48 ICR49 ICR50 ICR51 R/W
0x774 ICR52 ICR53 ICR54 ICR55 R/W
0x778 ICR56 ICR57 ICR58 ICR59 R/W
0x77C ICR60 ICR61 ICR62 ICR63 R/W
0x780-0x7D
C
— Reserved —
0x7E0 Software IACK Register SWIACK Reserved R
0x7E4 Level N IACK Registers L1IACK Reserved R
0x7E8 L2IACK Reserved R
0x7EC L3IACK Reserved R
0x7F0 L4IACK Reserved R
0x7F4 L5IACK Reserved R
0x7F8 L6IACK Reserved R
0x7FC L7IACK Reserved R
Table 13-2. Interrupt Controller Memory Map (Continued)
Address
Offset
Name Byte0 Byte1 Byte2 Byte3 Access