Freescale Semiconductor MCF5480 - Manual (Page 719)

MCF548x Reference Manual, Rev. 3
Freescale Semiconductor i
Part IV
Communications Subsystem
Part IV contains chapters that discuss the operation and configuration of the communications I/O
subsystem including the MCF548x multichannel DMA, communications timer, PSC, FEC, DSPI, and
USB2, and I
2
C.
Contents
Part IV contains the following chapters:
• Chapter 24, “Multichannel DMA,” provides an overview of the multichannel DMA controller
module including the operation of the external DMA request signals.
• Chapter 25, “Comm Timer Module (CTM),” contains a detailed description of the communications
timer module, which functions as a baud clock generator or as a DMA task initiator.
• Chapter 26, “Programmable Serial Controller (PSC),” provides an overview of asynchronous,
synchronous, and IrDA 1.1 compliant receiver/transmitter serial communications of the MCF548x.
• Chapter 27, “DMA Serial Peripheral Interface (DSPI),” describes the use of the DMA serial
peripheral interface (DSPI) implemented on the MCF548x processor, including details of the DSPI
data transfers. The chapter concludes with timing diagrams and the DSPI features that support Tx
and Rx FIFO queue management.
• Chapter 28, “I2C Interface,” describes the MCF548x I
2
C module, including I
2
C protocol, clock
synchronization, and the registers in the I
2
C programing model. It also provides programming
examples.
• Chapter 29, “USB 2.0 Device Controller,” provides an overview of the USB 2.0 device controller
module used in the MCF548x.
• Chapter 30, “Fast Ethernet Controller (FEC),” provides a feature-set overview, a functional block
diagram, and transceiver connection information for both MII (Media Independent Interface) and
7-wire serial interfaces. It also provides describes operation and the programming model.