Freescale Semiconductor MCF5480 - Manual (Page 820)

MCF548x Reference Manual, Rev. 3
27-2 Freescale Semiconductor
27.3 Block Diagram
Figure 27-1 shows a DSPI with external queues in system RAM.
Figure 27-1. DSPI with Queues and DMA
27.4 Modes of Operation
The DSPI has two modes of operation: master and slave. The two modes are entered by host software
writing to a register.
27.4.1 Master Mode
Master mode allows the DSPI to initiate and control serial communication. In this mode, the DSPISCK
signal and the DSPICSn signals are controlled by the DSPI and configured as outputs.
27.4.2 Slave Mode
The slave mode allows the DSPI to communicate with SPI bus masters. In this mode the DSPI responds
to externally controlled serial transfers. The DSPI cannot control serial transfers in slave mode. In slave
mode, the DSPISCK signal and the DSPICS0/SS signal are configured as inputs and provided by a bus
master.
DMA & Interrupt Control
TX FIFO
CMD Data Data
RX FIFO
Shift Register
SPI Baud Rate, Delay
and Transfer Control
16
DSPISOUT
DSPISIN
DSPISCK
DSPICS n/SS/PCSS
16
4
CommBus
DSPI