Freescale Semiconductor MCF5480 - Manual (Page 810)

MCF548x Reference Manual, Rev. 3
26-48 Freescale Semiconductor
26.6 Interrupts
This section describes interrupts originated by this module.
26.6.1 Description of Interrupt Operation
26.6.1.1 Processor Interrupt
This is the interrupt to the processor. There are five conditions to assert this interrupt:
• The IPC interrupt condition is met if the modem control input port (PSCnCTS) is changed and lasts
for a certain time.This interrupt is usually used in UART mode though it works under all modes.
• The DB condition is met if the PSCnRXD is held low for more than a character duration in UART
and SIR mode.
• The RxRDY is from PSCISR[9]. It is asserted when the alarm of the RXFIFO is asserted
(PSCIMR1[6] = 1) or there is at least one data in RXFIFO (PSCMR1[6] = 0).
• The TxRDY is different from cb_req_tx. It is asserted when
— the transmitter is enabled
— the number of the TXFIFO is less than or equal to the threshold TFAR
— the corresponding PSCIMR bit, PSCIMR[TxRDY(=8)], is high and enabled, i.e. when
PSCISR[8] (=SR[10]=(count<=alarm)) & PSCIMR[8] & ENTX
• The DEOF is from PSCISR[7]. It is asserted when there is an EOF in the RXFIFO.
26.7 Software Environment
26.7.1 General
This section provides information pertinent to programming the device.
Table 26-40. Interrupt Summary
Interrupt Mode Source Description
Processor
Interrupt
UART IPC The state of the modem control input ports had changed and a
certain time has passed.
DB Detected delta break. The input port RXD has kept low for a
certain time.
RXRDY There is one or more data in the RxFIFO
FU The number in the RxFIFO is more than the threshold
TXRDY The number in the TxFIFO is less than the threshold
modem
IrDA
RXRDY There is one or more data in the RxFIFO
FU The number in the RxFIFO is more than the threshold
TXRDY The number in the TxFIFO is less than the threshold