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4 pmon feature enable register - pmonen, Table 488. pmon feature enable register - pmonen, 5 pmon status register - pmonstat – Intel CONTROLLERS 413808 User Manual

Page 746: Table 489. pmon status register - pmonstat, Lexed onto the gpio7 pin. when the, Pmon feature enable register, The gpio7 setting in the, Section, 1, “gp, Pmon feature enable

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Intel

®

413808 and 413812—PMON Unit

Intel

®

413808 and 413812 I/O Controllers in TPER Mode

Developer’s Manual

October 2007

746

Order Number: 317805-001US

16.5.4

PMON Feature Enable Register - PMONEN

Contains control bits for

PMON

unit.

16.5.5

PMON Status Register - PMONSTAT

Contains status bits for

PMON

unit.

Table 488. PMON Feature Enable Register - PMONEN

Bit

Default

Description

31:2

0000 0000h Reserved

1

0b

PMON Indicator Output Enable.

Specifies that the

PMON

unit indicator should be allowed to

generate a signal on the

GPIO[7]

output pin. The conditions that can cause this signal to be toggle are

documented elsewhere in this document, this bit simply provides a global mask.

0 = Do NOT generate

PMON

Indicator Output (default).

1 = DO generate

PMON

Indicator Output which goes to the optional output pin (

GPIO[7]

).

Note:

The

PMON

Indicator Output Enable overrides the

GPIO[7]

setting in

Section 15.2.1, “GPIO

Output Enable Register — GPOE” on page 725

0

0b

Interrupt Enable: Enables 4138xx

PMON

unit generated interrupts.

PCI

IOP

Attributes

Attributes

28

24

20

16

12

8

4

0

31

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rw

rw

rw

rw

Attribute Legend:

RV = Reserved

PR = Preserved

RS = Read/Set

RW = Read/Write

RC = Read Clear

RO = Read Only

NA = Not Accessible

Internal Bus Address Offset

+040h

Table 489. PMON Status Register - PMONSTAT

Bit

Default

Description

31:1

0000 0000h Reserved

0

0b

Interrupt Status: Indicates a pending interrupt from

PMON

unit. This bit can only be set when the

Interrupt Enable bit in the

PMON

EN register is set.

0 =

PMON

Interrupt is NOT pending

1 =

PMON

Interrupt IS pending

PCI

IOP

Attributes

Attributes

28

24

20

16

12

8

4

0

31

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rv

rc

rc

Attribute Legend:

RV = Reserved

PR = Preserved

RS = Read/Set

RW = Read/Write

RC = Read Clear

RO = Read Only

NA = Not Accessible

Internal Bus Address Offset

+044h