Intel CONTROLLERS 413808 - Manual (Page 610)

Intel
®
413808 and 413812—Interrupt Controller Unit
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
610 Order Number: 317805-001US
10.7.20 IRQ Interrupt Source Register 3 — IINTSRC3
The IRQ Interrupt Source register is a 32-bit Coprocessor 6 control register used to
specify which of 32 interrupts that are steered to the internal IRQ exception are
unmasked by the INTCTL3 register and active. The INTSTR3 control register is used to
steer individual interrupts to the IRQ exception.
The IINTSRC3 register may be used by an Interrupt Service Routine (ISR) to determine
quickly the source of an IRQ interrupt.
Table 402. IRQ Interrupt Source Register 3 — IINTSRC3 (Sheet 1 of 2)
Bit Default Description
31 0
2
HPI Interrupt
0 = Not Interrupting or Not steered to internal IRQ exception or masked by INTCTL3
1 = Interrupting and steered to internal IRQ exception and unmasked by INTCTL3
30:18 0000 0H Reserved.
17 0
2
Inbound MSI Interrupt
0 = Not interrupting or not steered to internal IRQ exception or masked by INTCTL3
1 = Interrupting and steered to internal IRQ exception and unmasked by INTCTL3
16 0
2
Reserved.
15 0
2
MU MSI-X Table Write Interrupt
0 = Not Interrupting or Not steered to internal IRQ exception or masked by INTCTL3
1 = Interrupting and steered to internal IRQ exception and unmasked by INTCTL3
14 0
2
ATUE Interrupt Message D
0 = Not Interrupting or Not steered to internal IRQ exception or masked by INTCTL3
1 = Interrupting and steered to internal IRQ exception and unmasked by INTCTL3
13 0
2
ATUE Interrupt Message C
0 = Not Interrupting or Not steered to internal IRQ exception or masked by INTCTL3
1 = Interrupting and steered to internal IRQ exception and unmasked by INTCTL3
12 0
2
ATUE Interrupt Message B
0 = Not Interrupting or Not steered to internal IRQ exception or masked by INTCTL3
1 = Interrupting and steered to internal IRQ exception and unmasked by INTCTL3
11 0
2
ATUE Interrupt Message A
0 = Not Interrupting or Not steered to internal IRQ exception or masked by INTCTL3
1 = Interrupting and steered to internal IRQ exception and unmasked by INTCTL3
10:08 0
2
Reserved.
07 0
2
TPMI 0 Outbound Interrupt.
0 = 0 = Not Interrupting or Not steered to internal IRQ exception or masked by INTCTL3
1 = 1 = Interrupting and steered to internal IRQ exception and unmasked by INTCTL3
06:05 0
2
Reserved.
Memory
Coprocessor
Attributes
Attributes
28 24 20 16 12 8 4 0 31
ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro
na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Intel XScale ® processor Coprocessor address
CP6, Page 6, Register 3