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2 theory of operation, Figure 44. sgpio repeating bit stream, 1 sgpio sclock output signal – Intel CONTROLLERS 413808 User Manual

Page 460: 2 sgpio sload output signal, Figure 45. sload signal, 44 sgpio repeating bit stream, 45 sload signal, Intel

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Intel

®

413808 and 413812—SGPIO Unit

Intel

®

413808 and 413812 I/O Controllers in TPER Mode

Developer’s Manual

October 2007

460

Order Number: 317805-001US

6.2

Theory of Operation

The SGPIO is used to serialize general purpose I/O signals. For example, the initiator

may want to drive multiple LEDs on the target, and thus do so by sampling and

serializing the parallel initiator LED signals at a fixed sampling rate dictated by the

low-to-high transition of the SLoad signal. Note that SClock is a free-running clock. The

receiver (initiator or target) would then take the bit samples from the bit stream and

converts them into parallel LED signals.

Figure 44

shows the input and output bit streams relative to SClock and SLoad signals.

Note that the SGPIO interface sends a repeating bit stream on SDataOut and receives a

repeating bit stream SDataIn. The bit stream is restarted each time the SLoad signal is

set high. Note that the example in

Figure 44

shows four drives and five drives. The bit

stream need not be the same length every time.

6.2.1

SGPIO SClock Output Signal

SClock is a free-running clock, running at a fixed frequency of up to 100 KHz. The rising

edge of SClock is used to transmit SLoad, SDataOut, and SDataIn. The falling edge of

SClock is used to latch SLoad, SDataOut, and SDataIn.

6.2.2

SGPIO SLoad Output Signal

The initiator shall repeatedly send SDataOut bits and receives SDataIn bits. The SLoad

signal indicates when the bit stream is ending or being restarted. After SLoad is

asserted (set to 1), the next four bits positions on SLoad contain a vendor-specific

pattern. Following the vendor-specific pattern, the initiator shall set the SLoad to 0 until

it wants to restart the bits stream.

Figure 44. SGPIO Repeating Bit Stream

SClock

SLoad

SDataOut

SDataIn

D

ri

ve

0

D

ri

ve

1

D

ri

ve

2

D

ri

ve

3

Bit Stream

Bit Stream

D

ri

ve

0

D

ri

ve

1

D

ri

ve

2

D

ri

ve

3

D

ri

ve

4

B6343-01

Figure 45. SLoad Signal

0 s

Bit 0

Vendor-Specific

Bit

1

Vendor-Specific

Bit 2

Vendor-Specific

Bit 3

Vendor-Specific

1

Vendor-Specific

.

1

B6344-01