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Intel
®
413808 and 413812 I/O Controllers in TPER Mode
October 2007
Developer’s Manual
Order Number: 317805-001US
31
Contents—Intel
413808 and 413812
382 Interrupt Controller Co-Processor Register Addresses.................................................. 581
383 Interrupt Base Register — INTBASE.......................................................................... 583
384 Interrupt Size Register — INTSIZE ........................................................................... 584
385 IRQ Interrupt Vector Register- IINTVEC .................................................................... 585
386 FIQ Interrupt Vector Register- FINTVEC .................................................................... 586
387 Interrupt Pending Register 0 — INTPND0 .................................................................. 587
388 Interrupt Pending Register 1 — INTPND1 .................................................................. 588
389 Interrupt Pending Register 2 — INTPND2 .................................................................. 589
390 Interrupt Pending Register 3 — INTPND3 .................................................................. 590
391 Interrupt Control Register 0 — INTCTL0 .................................................................... 591
392 Interrupt Control Register 1 — INTCTL1 .................................................................... 593
393 Interrupt Control Register 2 — INTCTL2 .................................................................... 595
394 Interrupt Control Register 3 — INTCTL3 .................................................................... 596
395 Interrupt Steering Register 0 — INTSTR0 .................................................................. 598
396 Interrupt Steering Register 1 — INTSTR1 .................................................................. 600
397 Interrupt Steering Register 2 — INTSTR2 .................................................................. 602
398 Interrupt Steering Register 3 — INTSTR3 .................................................................. 603
399 IRQ Interrupt Source Register 0 — IINTSRC0............................................................. 605
400 IRQ Interrupt Source Register 1 — IINTSRC1............................................................. 607
401 IRQ Interrupt Source Register 2 — IINTSRC2............................................................. 609
402 IRQ Interrupt Source Register 3 — IINTSRC3............................................................. 610
403 FIQ Interrupt Source Register 0 — FINTSRC0............................................................. 612
404 FIQ Interrupt Source Register 1 — FINTSRC1............................................................. 614
405 FIQ Interrupt Source Register 2 — FINTSRC2............................................................. 616
406 FIQ Interrupt Source Register 3 — FINTSRC3............................................................. 617
407 Interrupt Priority Register 0 — IPR0.......................................................................... 619
408 Interrupt Priority Register 1 — IPR1.......................................................................... 620
409 Interrupt Priority Register 2 — IPR2.......................................................................... 621
410 Interrupt Priority Register 3 — IPR3.......................................................................... 622
411 Interrupt Priority Register 4 — IPR4.......................................................................... 623
412 Interrupt Priority Register 5 — IPR5.......................................................................... 624
413 Interrupt Priority Register 6 — IPR6.......................................................................... 625
414 Interrupt Priority Register 7 — IPR7.......................................................................... 626
415 Timer Performance Ranges...................................................................................... 627
416 Timer Mode Register Control Bit Summary ................................................................ 628
417 Timer Responses to Register Bit Settings................................................................... 630
418 Timer Registers ..................................................................................................... 633
419 Timer Power Up Mode Settings ................................................................................ 633
420 Timer Mode Register – TMRx ................................................................................... 634
421 Timer Input Clock (TCLOCK) Frequency Selection ....................................................... 636
422 Timer Count Register – TCRx................................................................................... 637
423 Timer Reload Register – TRRx.................................................................................. 637
424 Timer Interrupt Status Register – TISR ..................................................................... 638
425 Watch Dog Timer Control Register — WDTCR............................................................. 639
426 Watch Dog Timer Setup Register — WDTSR............................................................... 639
427 Uncommon TMRx Control Bit Settings ....................................................................... 640
428 SMBus Interface Pins.............................................................................................. 641
429 SMBus Command Encoding ..................................................................................... 643
430 SMBus Interface Registers for Configuration Space Access........................................... 647
431 SMBus Interface Registers for Memory Space Access .................................................. 647
432 SMBus Status Byte Encoding ................................................................................... 649
433 SMBus Register Summary ....................................................................................... 655
434 SMBus Controller Command Register — SM_CMD....................................................... 655
435 SMBus Controller Byte Count Register — SM_BC ........................................................ 656
436 SMBus Controller ADDR3 Register — SM_ADDR3........................................................ 656
