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Intel CONTROLLERS 413808 User Manual

Page 6

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Intel

®

413808 and 413812—Contents

Intel

®

413808 and 413812 I/O Controllers in TPER Mode

Developer’s Manual

October 2007

6

Order Number: 317805-001US

2.14.8 ATU Class Code Register - ATUCCR .........................................................151

2.14.9 ATU Cacheline Size Register - ATUCLSR...................................................152

2.14.10ATU Latency Timer Register - ATULT .......................................................152

2.14.11ATU Header Type Register - ATUHTR.......................................................153

2.14.12ATU BIST Register - ATUBISTR...............................................................154

2.14.13Inbound ATU Base Address Register 0 - IABAR0........................................155

2.14.14Inbound ATU Upper Base Address Register 0 - IAUBAR0 ............................156

2.14.15Inbound ATU Base Address Register 1 - IABAR1........................................157

2.14.16Inbound ATU Upper Base Address Register 1 - IAUBAR1 ............................158

2.14.17Inbound ATU Base Address Register 2 - IABAR2........................................159

2.14.18Inbound ATU Upper Base Address Register 2 - IAUBAR2 ............................160

2.14.19ATU Subsystem Vendor ID Register - ASVIR.............................................161

2.14.20ATU Subsystem ID Register - ASIR .........................................................161

2.14.21Expansion ROM Base Address Register - ERBAR........................................162

2.14.22ATU Capabilities Pointer Register - ATU_Cap_Ptr.......................................163

2.14.23Determining Block Sizes for Base Address Registers ..................................164

2.14.24ATU Interrupt Line Register - ATUILR ......................................................166

2.14.25ATU Interrupt Pin Register - ATUIPR........................................................167

2.14.26ATU Minimum Grant Register - ATUMGNT.................................................167

2.14.27ATU Maximum Latency Register - ATUMLAT..............................................168

2.14.28Inbound ATU Limit Register 0 - IALR0......................................................169

2.14.29Inbound ATU Translate Value Register 0 - IATVR0.....................................170

2.14.30Inbound ATU Upper Translate Value Register 0 - IAUTVR0..........................170

2.14.31Inbound ATU Limit Register 1 - IALR1......................................................171

2.14.32Inbound ATU Translate Value Register 1 - IATVR1.....................................172

2.14.33Inbound ATU Upper Translate Value Register 1 - IAUTVR1..........................172

2.14.34Inbound ATU Limit Register 2 - IALR2......................................................173

2.14.35Inbound ATU Translate Value Register 2 - IATVR2.....................................174

2.14.36Inbound ATU Upper Translate Value Register 2 - IAUTVR2..........................174

2.14.37Expansion ROM Limit Register - ERLR......................................................175

2.14.38Expansion ROM Translate Value Register - ERTVR .....................................176

2.14.39Expansion ROM Upper Translate Value Register - ERUTVR ..........................176

2.14.40ATU Configuration Register - ATUCR........................................................177

2.14.41PCI Configuration and Status Register - PCSR...........................................178

2.14.42ATU Interrupt Status Register - ATUISR...................................................181

2.14.43ATU Interrupt Mask Register - ATUIMR ....................................................183

2.14.44VPD Capability Identifier Register - VPD_Cap_ID.......................................185

2.14.45VPD Next Item Pointer Register - VPD_Next_Item_Ptr ...............................185

2.14.46VPD Address Register - VPDAR ...............................................................186

2.14.47 VPD Data Register - VPDDR...................................................................186

2.14.48PM Capability Identifier Register - PM_Cap_ID ..........................................187

2.14.49PM Next Item Pointer Register - PM_Next_Item_Ptr...................................187

2.14.50ATU Power Management Capabilities Register - APMCR..............................188

2.14.51ATU Power Management Control/Status Register - APMCSR........................189

2.14.52ATU Scratch Pad Register - ATUSPR ........................................................190

2.14.53PCI-X Capability Identifier Register - PCI-X_Cap_ID ..................................190

2.14.54PCI-X Next Item Pointer Register - PCI-X_Next_Item_Ptr...........................191

2.14.55PCI-X Command Register - PCIXCMD ......................................................191

2.14.56PCI-X Status Register - PCIXSR ..............................................................193

2.14.57ECC Control and Status Register - ECCCSR...............................................195

2.14.58ECC First Address Register - ECCFAR.......................................................198

2.14.59ECC Second Address Register - ECCSAR ..................................................199

2.14.60ECC Attribute Register - ECCAR ..............................................................200

2.14.61CompactPCI Hot-Swap Capability ID Register ...........................................200

2.14.62Offset EDh: HS_NXTP - Next Item Pointer................................................201