2 timer mode registers - tmr0:1, Table 420. timer mode register - tmrx, 2 timer mode registers – tmr0:1 – Intel CONTROLLERS 413808 User Manual

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Intel

413808 and 413812—Timers

Intel

413808 and 413812 I/O Controllers in TPER Mode

Developer’s Manual

October 2007

634

Order Number: 317805-001US

11.4.2

Timer Mode Registers – TMR0:1

The Timer Mode Register (TMRx) lets the user program the mode of operation and

determine the current status of the timer. TMRx bits are described in the subsections

following

Table 420

and are summarized in

Table 416

Table 420. Timer Mode Register – TMRx

31:06

0000 000H

Reserved. Initialize to 0.

05:04

Timer Input Clock Selects — TMRx.csel1:0

(00) 1:1 Timer Clock = internal bus clock

(01) 4:1 Timer Clock = internal bus clock / 4

(10) 8:1 Timer Clock = internal bus clock / 8

(11) 16:1 Timer Clock = internal bus clock / 16

Timer Register Privileged Write Control — TMRx.pri

(0) Privileged and User Mode Write Enabled

(1) Privileged Mode Only Write Enabled

Timer Auto Reload Enable — TMRx.reload

(0) Auto Reload Disabled

(1) Auto Reload Enabled

Timer Enable — TMRx.enable

(0) Disabled

(1) Enabled

Terminal Count Status — TMRx.tc

(0) No Terminal Count

(1) Terminal Count

MMR

Attribute Legend:

RV = Reserved

PR = Preserved

RS = Read/Set

RW = Read/Write

RC = Read Clear

RO = Read Only

NA = Not Accessible

Intel XScale

processor Coprocessor

address

TMR0: CP6, Page 9, Register 0

TMR1: CP6, Page 9, Register 1