Intel CONTROLLERS 413808 - Manual (Page 628)

Intel ® 413808 and 413812—Timers
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
628 Order Number: 317805-001US
11.1 Timer Operation
This section summarizes the programmable timer and Watch Dog Timer operation and
describes load/store access latency for the timer registers.
11.1.1 Basic Programmable Timer Operation
Each timer has a programmable enable bit in its control register (TMRx.enable) to start
and stop counting. This allows the programmer to prevent user mode tasks from
enabling or disabling the timer. Once the timer is enabled, the value stored in the Timer
Count Register (TCRx) decrements every Timer Clock (TCLOCK) cycle. TCLOCK is
determined by the Timer Input Clock Select (TMRx.csel) bit setting. The countdown
rate can be set to equal the internal bus clock frequency, or the internal bus clock rate
divided by 4, 8 or 16. Setting TCLOCK to a slower rate lets the user specify a longer
count period with the same 32-bit TCRx value.
Software can read or write the TCRx value whether the timer is running or stopped.
This lets the user monitor the count without using hardware interrupts.
When the TCRx value decrements to zero, the unit’s interrupt request signals the
processor’s interrupt controller. See Section 11.2, “Timer Interrupts” on page 631 for
more information. The timer checks the value of the timer reload bit (TMRx.reload)
setting. When TMRx.reload. = 1, the processor:
• Automatically reloads TCRx with the value in the Timer Reload Register (TRRx).
• Decrements TCRx until it equals 0 again.
This process repeats until software clears TMRx.reload or TMR.enable.
When TMRx.reload = 0, the timer stops running and sets the terminal count bit
(TMRx.tc). This bit remains set until user software reads or writes the TMRx register.
Either access type clears the bit. The timer ignores any value specified for TMRx.tc in a
write request.
Table 416. Timer Mode Register Control Bit Summary
T
R
R
x
T
C
R
x
B
it
2
(T
M
R
x
.r
e
lo
a
d
)
B
it
1
(T
M
R
x
.e
n
a
b
le
)
Action
X X X 0 Timer disabled.
Note: X = don’t care
N = a number between 1H and FFFF FFFFH