66 pci express slot status register - pe_ssts, 66pci express slot status register - pe_ssts, 206 pci express slot status register pe_ssts – Intel CONTROLLERS 413808 User Manual
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Intel
®
413808 and 413812—Address Translation Unit (PCI Express)
Intel
®
413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual
October 2007
352
Order Number: 317805-001US
3.17.66 PCI Express Slot Status Register - PE_SSTS
This register provides information about PCI Express Slot specific parameters.
4138xx does not implement Hot-Plug support for its downstream ports when operating
as a root complex. This is left as R/W for the IOP in case a software solution can be
implemented using the GPIO pins.
.
Table 206. PCI Express Slot Status Register PE_SSTS
Bit
Default
Description
15:7
0H
Reserved Zero
6
0
Presence Detect State
5
0
MRL Sensor State
4
0
Command Completed
3
0
Presence Detect Changed
2
0
MRL Sensor Changed
1
0
Power Fault Detected
0
0
Attention Button Pressed
PCI
IOP
Attributes
Attributes
15
12
8
4
0
rz
rz
rz
rz
rz
rz
rz
rz
rz
rz
rz
rz
rz
rz
rz
rz
rz
ro
ro
ro
ro
ro
rc
rc
rc
rc
rc
rc
rc
rc
rc
rc
Attribute Legend:
RZ = Reserved Zero
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Internal Bus Address Offset
+0EAH