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1 transaction ordering – Intel CONTROLLERS 413808 User Manual

Page 402

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Intel

®

413808 and 413812—Messaging Unit

Intel

®

413808 and 413812 I/O Controllers in TPER Mode

Developer’s Manual

October 2007

402

Order Number: 317805-001US

4.2.1

Transaction Ordering

From a PCI standpoint, the Messaging Unit is a piece of the ATU and therefore must

maintain ordering requirements against ATU transactions. Transaction ordering is

achieved for the Index Registers, the Doorbell Register, and the Message Registers

since these transactions are routed through the standard set of ATU read/write queues.