Intel CONTROLLERS 413808 User Manual
Page 18

Intel
®
413808 and 413812—Contents
Intel
®
413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual
October 2007
18
Order Number: 317805-001US
14.5.4 Write 2 Bytes and Repeated Start Read 1 Byte as a Master ........................710
14.5.5 Read 2 Bytes as a Master — Send STOP Using the Abort............................711
C Control Register x — ICRx ................................................................715
C Status Register x — ISRx .................................................................717
C Slave Address Register x — ISARx.....................................................719
C Data Buffer Register x — IDBRx ........................................................720
C Bus Monitor Register x — IBMRx .......................................................721
C Manual Bus Control Register x — IMBCRx ...........................................722
15.1.3 Reset Initialization of General Purpose I/O Function...................................723
15.2.1 GPIO Output Enable Register — GPOE .....................................................725
15.2.2 GPIO Input Data Register — GPID...........................................................726
15.2.3 GPIO Output Data Register — GPOD........................................................728
PMON
Unit ..............................................................................................................729
PMON
Counters ..............................................................................................729
16.5.2.1 Indicator Output .....................................................................744
16.5.2.2 Interrupt Output .....................................................................744
PMON
Feature Enable Register -
PMON
EN ..............................................746
PMON
Status Register -
PMON
STAT.......................................................746
PMON
Memory Mapped Registers...........................................................747
PMON
Command Register 0-7 -
PMON
_CMD[0:7] ......................749
PMON
Event Register 0-7 -
PMON
_EVR[0:7] .............................753
PMON
Status Register 0-7 -
PMON
_STS[0:7] ............................754
PMON
Data Register 0-7 -
PMON
_DATA[0:7].............................756
PMON
Events ......................................................................................757
16.5.7.2 Clock Events...........................................................................758