Intel CONTROLLERS 413808 - Manual (Page 604)

Intel
®
413808 and 413812—Interrupt Controller Unit
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
604 Order Number: 317805-001US
04 0
2
IMU Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
03 0
2
ATU-E Error Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
02 0
2
ATU-E Configuration Register Write Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
01 0
2
ATU-E/Start BIST Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
00 0
2
I 2 C Bus Interface 2 Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
Table 398. Interrupt Steering Register 3 — INTSTR3 (Sheet 2 of 2)
Bit Default Description
Memory
Coprocessor
Attributes
Attributes
28 24 20 16 12 8 4 0 31
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Intel XScale ® processor Coprocessor
address
CP6, Page 5, Register 3