Intel CONTROLLERS 413808 - Manual (Page 635)

Intel ® 413808 and 413812 I/O Controllers in TPER Mode
October 2007 Developer’s Manual
Order Number: 317805-001US 635
Timers—Intel ® 413808 and 413812
11.4.2.1 Bit 0 — Terminal Count Status Bit (TMRx.tc)
The TMRx.tc bit is set when the Timer Count Register (TCRx) decrements to 0 and bit 2
(TMRx.reload) is not set for a timer. The TMRx.tc bit allows applications to monitor
timer status through software instead of interrupts. TMRx.tc remains set until software
accesses (reads or writes) TMRx. The access clears TMRx.tc. The timer ignores any
value specified for TMRx.tc in a write request.
When auto-reload is selected for a timer and the timer is enabled, the TMRx.tc bit
status is unpredictable. Software should not rely on the value of the TMRx.tc bit when
auto-reload is enabled.
The processor also clears the TMRx.tc bit upon hardware or software reset. Refer to
Section 17.2, “Reset Overview” on page 770 .
11.4.2.2 Bit 1 — Timer Enable (TMRx.enable)
TMRx.enable bit allows user software to control the timer’s RUN/STOP status. When:
User software sets this bit. Once started, the timer continues to run, regardless of
other processor activity. Three events can stop the timer:
• User software explicitly clearing this bit (i.e., TMRx.enable = 0).
• TCRx value decrements to 0, and Timer Auto Reload Enable (TMRx.reload) bit = 0.
• Hardware or software reset. Refer to Section 17.2, “Reset Overview” on page 770 .
11.4.2.3 Bit 2 — Timer Auto Reload Enable (TMRx.reload)
The TMRx.reload bit determines whether the timer runs continuously or in single-shot
mode. When TCRx = 0 and TMRx.enable = 1 and:
1. Automatically loads TCRx with the value in the Timer Reload Register (TRRx), when
TCRx value decrements to 0.
2. Decrements TCRx until it equals 0 again.
Steps 1 and 2 repeat until software clears TMRx bits 1 or 2.
User software sets this bit. When TMRx.enable and TMRx.reload are set and TRRx does
not equal 0, the timer continues to run in auto-reload mode, regardless of other
processor activity. Two events can stop the timer:
• User software explicitly clearing either TMRx.enable or TMRx.reload.
• Hardware or software reset.
The processor clears this bit upon hardware or software reset.
TMRx.enable = 1 The Timer Count Register (TCRx) value decrements every Timer
Clock (TCLOCK) cycle. TCLOCK is determined by the Timer Input
Clock Select (TMRx.csel bits 0-1). See Section 11.4.2.5 . When
TMRx.reload=0, the timer automatically clears TMRx.enable when
the count reaches zero. When TMRx.reload=1, the bit remains set.
See Section 11.4.2.3 .
TMRx.enable = 0 The timer is disabled and ignores all input transitions.
TMRx.reload = 1 The timer runs continuously. The processor:
TMRx.reload = 0 The timer runs until the Timer Count Register = 0. TRRx has
no effect on the timer.