Intel CONTROLLERS 413808 - Manual (Page 729)

Intel ® 413808 and 413812 I/O Controllers in TPER Mode
October 2007 Developer’s Manual
Order Number: 317805-001US 729
PMON Unit—Intel ® 413808 and 413812
16.0 PMON Unit
16.1 PMON Counters
The Performance Monitoring ( PMON ) counters enable performance monitoring and
gathering statistics of internal hardware events in real-time. This implementation
provides users with direct event counting and timing for performance monitoring and
system debugging purposes. It provides enough visibility into the internal architecture
to perform utilization studies, workload characterization, and application tuning.
16.2 Overview
At the heart of the PMON functionality are counters with associated registers. Each
counter has a corresponding command, event, status, and data register. The PMON
unit implements eight counters.
Signals representing events from throughout the chip are routed to the
PMON unit.
Software can select which events are recorded during a measurement session. The
starting, stopping, and sampling of the counters can be controlled by either software or
hardware. This can be done in a time-based (polling) or event-based fashion. Each
counter can be incremented or decremented by different events. In addition to simple
counting of events the unit can provide data for histograms, queue analysis, and
conditional event counting (example: How many times did event A happen before the
first event B took place).
Figure 106. Example Block Diagram of Component with Counter
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Indicator Output Pin
Programming
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Event
Inputs
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