11 unique id register 0 - uid0, Table 374. unique id register 0 - uid0, 12 unique id register 1 - uid1 – Intel CONTROLLERS 413808 User Manual
Page 564: Table 375. unique id register 1 - uid1, 11 unique id register 0 — uid0, 12 unique id register 1 — uid1, 374 unique id register 0 — uid0, 375 unique id register 1 — uid1, Intel, Bit default description
Intel
®
413808 and 413812—Peripheral Bus Interface Unit
Intel
®
413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual
October 2007
564
Order Number: 317805-001US
9.3.11
Unique ID Register 0 — UID0
The Unique ID register 0 represents a 28-bit unique value.
9.3.12
Unique ID Register 1 — UID1
The Unique ID register 1 represents a 23-bit unique value.
Table 374. Unique ID Register 0 — UID0
Bit
Default
Description
31:28
0H
Reserved.
27:00
xxxx.xxxx.xxxx.xx
xx.xxxx.xxxx.xxxx
2
Unique ID 0.
PCI
IOP
Attributes
Attributes
28
24
20
16
12
8
4
0
31
rv
na
rv
na
rv
na
rv
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Intel XScale
®
processor Local Bus Address offset
+2194H
Table 375. Unique ID Register 1 — UID1
Bit
Default
Description
31:23
00H
Reserved.
22:00 xxx.xxxx.xxxx.xxx
x.xxxx.xxxx
2
Unique ID 1.
PCI
IOP
Attributes
Attributes
28
24
20
16
12
8
4
0
31
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
ro
na
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Intel XScale
®
processor Local Bus Address offset
+2198H