Intel CONTROLLERS 413808 - Manual (Page 278)

Intel
®
413808 and 413812—Address Translation Unit (PCI Express)
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
278 Order Number: 317805-001US
Table 136. Root Complex Error Summary
Error Condition Bus Protocol Action
Affected
Logging
Register
Affected bits in
Unit Status
Register
Affected bits in
Interrupt Status
Register
Unit Interrupt
Mask Bits
Root Complex Errors
Received
ERR_COR
None RERR_ID RERR_SR[1, 0] ATUISR[12, 11]
ATUIMR[12]
RERR_CMD[0]
Received
ERR_NONFATAL
None RERR_ID
RERR_SR[5, 4, 3,
2]
ATUISR[12, 11]
ATUIMR[12]
RERR_CMD[1]
Received
ERR_FATAL
None RERR_ID
RERR_SR[6, 4, 3,
2]
ATUISR[12, 11]
ATUIMR[12]
RERR_CMD[2]
Table 137. Internal Bus Error Summary
Error Condition Bus Protocol Action
Affected
Logging
Register
Affected bits in
Unit Status
Register
Affected bits in
Interrupt Status
Register
Unit Interrupt
Mask Bits
Internal Bus Errors
Master Abort on
inbound requests
Signal Completer
Abort
See Completer
Abort above
See Completer
Abort above
Completer Abort
and ATUISR[5]
Completer Abort
and ATUIMR[5]
AERR on inbound
requests
Signal Completer
Abort
See Completer
Abort above
See Completer
Abort above
Completer Abort
and ATUISR[5]
Completer Abort
and ATUIMR[5]
Target Abort on
inbound requests
Signal Completer
Abort
See Completer
Abort above
See Completer
Abort above
See Completer
Abort above
See Completer
Abort above
Data Parity Error
on outbound
Writes or
Completions
Set EP bit in TLP
Header.
Posted Writes may
get flushed when
bit 8 of ATUCR is set.
See Poisoned TLP
Transmitted
above
See Poisoned TLP
Transmitted above
See Poisoned TLP
Transmitted above
See Poisoned TLP
Transmitted above
Header Parity
Error in Link
Layer Retry
Buffer
TLP transmitted as
Malformed.
Posted Writes may
get flushed when
bit 8 of ATUCR is set.
See Outbound
Header Parity
Error above
INTPND3[3]