5 pbi limit register 0 - pblr0, Table 368. pbi limit register 0 - pblr0, 5 pbi limit register 0 — pblr0 – Intel CONTROLLERS 413808 User Manual

Page 558: 368 pbi limit register 0 — pblr0, Intel, Bit default description, Processor local bus address, 158ch

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5 pbi limit register 0 - pblr0, Table 368. pbi limit register 0 - pblr0, 5 pbi limit register 0 — pblr0 | 368 pbi limit register 0 — pblr0, Intel, Bit default description, Processor local bus address, 158ch | Intel CONTROLLERS 413808 User Manual | Page 558 / 824