5 inbound interrupt mask register - iimr, Table 270. inbound interrupt mask register - iimr, 270 inbound interrupt mask register - iimr – Intel CONTROLLERS 413808 User Manual
Page 415: Inbound interrupt mask, Register - iimr, Processor interrupt, Messaging unit—intel, Bit default description
5 inbound interrupt mask register - iimr, Table 270. inbound interrupt mask register - iimr, 270 inbound interrupt mask register - iimr | Inbound interrupt mask, Register - iimr, Processor interrupt, Messaging unit—intel, Bit default description | Intel CONTROLLERS 413808 User Manual | Page 415 / 824