28 inbound atu limit register 0 - ialr0, Table 55. inbound atu limit register 0 - ialr0, 28inbound atu limit register 0 - ialr0 – Intel CONTROLLERS 413808 User Manual

Page 169: 55 inbound atu limit register 0 - ialr0, Address translation unit (pci-x)—intel, Bit default description

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28 inbound atu limit register 0 - ialr0, Table 55. inbound atu limit register 0 - ialr0, 28inbound atu limit register 0 - ialr0 | 55 inbound atu limit register 0 - ialr0, Address translation unit (pci-x)—intel, Bit default description | Intel CONTROLLERS 413808 User Manual | Page 169 / 824