Cirrus Logic EP93xx User Manual
Page 787
DS785UM1
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Copyright 2007 Cirrus Logic
IDE Interface
EP93xx User’s Guide
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Definition:
In UDMA data-out and data-in operations, this register contains status about
the output and input signals, state machine status and error reporting. Several
bits reflect external pins. Their reset state can vary depending on system
implementation and system configuration.
Bit Descriptions:
RSVD:
Reserved. Unknown during read, ignored during write.
CS0n:
Chip select pin0 status. Should be driven to 1 (deasserted)
in UDMA.
CS1n:
Chip select pin1 status. Should be driven to 1 (deasserted)
in UDMA.
DA:
Device address status. Should be driven to 0x0 (de-
asserted) in UDMA.
HSHD:
HSTROBE (during data-out) and HDMARDYn (during
data-in) status. Driven by UDMA state machine.
STOP:
STOP (during data-out) status. Driven by UDMA state
machine.
DM:
DMACKn (both data-out and data-in) status. Driven by
UDMA state machine.
DDOE:
DD bus output enable as controlled by UDMA state
machine.
DMARQ:
Synchronized version of DMARQ input from device.
DSDD:
DSTROBE (during data-in) and DDMARDYn (during data-
out) status from device.
DMAide:
DMA request signal from UDMA state machine.
INTide:
INT line generated by UDMA because of errors in the state
machine.
SBUSY:
UDMA state machine busy, not in idle state.
NDO:
Error for data-out not completed.
NDI:
Error for data-in not completed.
N4X:
Error for data transferred not multiples of four 32-bit words.