Cirrus Logic EP93xx User Manual

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DS785UM1

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1/10/100 Mbps Ethernet LAN Controller

EP93xx User’s Guide

EOF:

End Of Frame. When this bit is set, the associated buffer
contains the last data associated with this frame. In the
case of an extra data or overrun error, the buffer may not
contain the actual end of frame data. For a receive header
status the EOF and EOB bits will both be clear.

EOB:

End Of Buffer. When this bit is set, no more data will be
transferred to the associated data buffer. This may be due
to an end of frame transfer or to reaching the actual end of
the buffer. For a receive header status the EOF and EOB
bits will both be clear.

AM:

Address Match:
00 - Individual Address match
01 - Global Address match
10 - Hashed Individual Address
11 - Hashed Multicast Address

RX_Err:

RX Error. The RX_Err is set for any receive frame for
which the RX_ERR (MII pin) was activated.

OE:

Overrun Error. The receive overrun bit is set on any frame
which could not be completely transferred to system
memory. This could be as a result of insufficient buffer
space, or an excessive bus arbitration time.

FE:

Framing Error. This bit is set for any frame not having an
integral number of bytes, and received with a bad CRC
value.

Runt:

Runt Frame. The Runt bit is set for any receive frame,
including CRC, that is shorter than 64 bytes.

EData:

Extra Data. The ExtraData bit indicates that the length of
the incoming frame was equal or greater than the value
programmed in the Max Frame Len register. The receive
frame will be terminated at this maximum length to
conserve system buffer space.

CRCE:

CRC Error. This indicates the frame was received with a
bad CRC.

CRCI:

CRC Included. This bit is set to one when the CRC has
been included in the Receive data buffer. Including or
excluding the CRC is controlled by the BufferCRC bit in
the RXCtl register.