Cirrus Logic EP93xx User Manual
Page 168

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DS785UM1
Copyright 2007 Cirrus Logic
Vectored Interrupt Controller
EP93xx User’s Guide
6
6
6
UART1TXINTR1
UART 1 Transmit Interrupt. See
HDLC and Modem Control Signals"
.
UART1RXINTR2
UART 2 Receive Interrupt. See
UART1TXINTR2
UART 2 Transmit Interrupt. See
”.
UART1RXINTR3
UART 3 Receive Interrupt. See
UART1TXINTR3
UART 3 Transmit Interrupt. See
INT_KEY
Key Matrix Interrupt. See
Chapter 26, "Keypad Interface".
INT_TOUCH
Touch Screen Controller Interrupt. This is the general
interrupt from the TSC. See
.
INT_EXT[0]
External Interrupt 0.
INT_EXT[1]
External Interrupt 1.
INT_EXT[2]
External Interrupt 2.
TINTR
64Hz TICK Interrupt. This interrupt becomes active on
every rising edge of the internal 64Hz clock. The 64Hz
clock is derived from a 15-stage ripple counter that divides
the 32.768kHz oscillator input down to 1Hz for the real
time clock. This interrupt is cleared by writing any value to
the
WEINT
Watchdog Expired Interrupt. This interrupt will become
active on a rising edge of the periodic 64Hz tick interrupt
clock if the TICK interrupt (TINT) is still active. That is, if a
tick interrupt has not been serviced for a complete tick
period. Both WEINT and TINT interrupts are cleared by
writing any value to the
register, see
"Real Time Clock With Software Trim"
. Failure to service
this interrupt does not cause a system reset and the action
taken on receipt of this interrupt is system dependent.
INT_RTC
Real Time Clock interrupt. See
INT_IrDA
.
INT_MAC
Ethernet MAC Interrupt. See
.
INT_PROG
Programmable Interrupt. See
,
With Analog/LCD Integrated Timing and Interface"
.