Cirrus Logic EP93xx User Manual
Page 103
DS785UM1
3-33
Copyright 2007 Cirrus Logic
MaverickCrunch Co-Processor
EP93xx User’s Guide
3
3
3
Convert 32-bit Integer to Double Precision Floating Point
Description:
Converts a 32-bit integer to a double precision floating point value.
Mnemonic:
CFCVT32D
Bit Definitions:
CRd: Destination
register
CRn: Source
register
Convert 64-bit Integer to Single Precision Floating Point
Description:
Converts a 64-bit integer to a single precision floating point value.
Mnemonic:
CFCVT64S
Bit Definitions:
CRd: Destination
register
CRn: Source
register
Convert 64-bit Integer to Double Precision Floating Point
Description:
Converts a 64-bit integer to a double precision floating point value.
Mnemonic:
CFCVT64D
Bit Definitions:
CRd: Destination
register
CRn: Source
register
31:28
27:24
23:22
21:20
19:16
15:12
11:8
7:5
4
3:0
cond
1 1 1 0
0 0
0 0
CRn
CRd
0 1 0 0
1 0 1
0
CRm
31:28
27:24
23:22
21:20
19:16
15:12
11:8
7:5
4
3:0
cond
1 1 1 0
0 0
0 0
CRn
CRd
0 1 0 0
1 1 0
0
CRm
31:28
27:24
23:22
21:20
19:16
15:12
11:8
7:5
4
3:0
cond
1 1 1 0
0 0
0 0
CRn
CRd
0 1 0 0
1 1 1
0
CRm