Cirrus Logic EP93xx - Manual (Page 390)

9-88 DS785UM1
Copyright 2007 Cirrus Logic
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
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The hard and soft threshold work in exactly the same
manner except one. The soft threshold will not cause a
bus request to be made if the bus is currently in use, but
only when it is deemed to be idle (no transfers for four
AHB clocks). The hard threshold takes effect immediately
regardless of the state of the bus. This operation allows for
more efficient use of the AHB bus by allowing smaller
transfers to take place when the bus is lightly loaded and
requesting larger transfers only when the bus is more
heavily loaded.
TXStsThrshld
Address:
0x8001_00DC - Read/Write
Suggested Value:
0x0004_0002
Chip Reset:
0x0000_0000
Soft Reset:
Unchanged
Definition:
Transmit Status Threshold register. The transmit status thresholds are used to
set a limit on the amount of transmit status which is held in the transmit status
FIFO before a bus request will be scheduled. When the number of words in
the FIFO exceeds the threshold value, the Descriptor Processor will schedule
a bus request to transfer status. The lower two bits of the thresholds are
always zero.
Bit Descriptions:
RSVD: Reserved. Unknown During Read.
0: Must be written as “0”.
TSHT: Transmit Status Hard Threshold.
TSST: Transmit Status Soft Threshold.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD TSHT 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD TSST 0 0