Chapter 3. maverickcrunch co-processor -1, Chapter 4. boot rom -1 – Cirrus Logic EP93xx User Manual
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Copyright 2007 Cirrus Logic, Inc.
DS785UM1
EP93xx User’s Guide
2.3.2.1 Function and Operation of the AHB-to-APB Bridge .....................................2-12
2.3.3 APB Slave .....................................................................................................................2-13
2.3.4 Register Definitions .......................................................................................................2-13
2.3.5 Memory Map..................................................................................................................2-16
2.3.6 Internal Register Map ....................................................................................................2-17
Chapter 3. MaverickCrunch Co-Processor ......................................................... 3-1
3.1.1 Features ..........................................................................................................................3-1
3.1.2 Operational Overview ......................................................................................................3-1
3.1.3 Pipelines and Latency .....................................................................................................3-3
3.1.4 Data Registers.................................................................................................................3-3
3.1.5 Integer Saturation Arithmetic ...........................................................................................3-4
3.1.6 Comparisons ...................................................................................................................3-6
3.3 DSPSC Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
3.4 ARM Co-Processor Instruction Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-14
3.5 Instruction Set for the MaverickCrunch Co-Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-17
3.5.1 Load and Store Instructions...........................................................................................3-21
3.5.2 Move Instructions ..........................................................................................................3-24
3.5.3 Accumulator and DSPSC Move Instructions .................................................................3-27
3.5.4 Copy and Conversion Instructions.................................................................................3-31
3.5.5 Shift Instructions ............................................................................................................3-35
3.5.6 Compare Instructions ....................................................................................................3-36
3.5.7 Floating Point Arithmetic Instructions ............................................................................3-38
3.5.8 Integer Arithmetic Instructions .......................................................................................3-41
3.5.9 Accumulator Arithmetic Instructions ..............................................................................3-45
4.1.2.1 Image Header ................................................................................................4-2
4.1.2.2 Boot Algorithm ...............................................................................................4-2
4.1.2.3 Flowchart .......................................................................................................4-3
4.2.1 UART Boot ......................................................................................................................4-6
4.2.2 SPI Boot ..........................................................................................................................4-6
4.2.3 FLASH Boot.....................................................................................................................4-6
4.2.4 SDRAM or SyncFLASH Boot ..........................................................................................4-7