Cirrus Logic EP93xx - Manual (Page 482)

12-4 DS785UM1
Copyright 2007 Cirrus Logic
Static Memory Controller
EP93xx User’s Guide
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Figure 12-3. 16-bit Read, 16-bit Memory, RBLE = 1, WAITn Active
Figure 12-4. 16-bit Write, 16-bit Memory, RBLE = 1, WAITn Active
Address
Data
RDn/OEn
nCSx
HCLK
Data Read
WAITn
Delay due to WAITn synchronization
AD[x]
DA[x]
WRn and nDMQ[1:0]
nCSx
HCLK
Data Write
WAITn
Delay due to WAITn synchronization