Cirrus Logic EP93xx - Manual (Page 549)

DS785UM1 14-27
Copyright 2007 Cirrus Logic
UART1 With HDLC and Modem Control Signals
EP93xx User’s Guide
1
4
1
4
14
Definition:
Modem Status Register
Bit Descriptions:
RSVD: Reserved. Unknown During Read.
DCD: Inverse of DCDn input pin. Note that this is identical to the
DSR device pin.
RI: Inverse of RI input pin.
DSR: Inverse of the DSRn pin. Note that this is identical to the
DCD device pin
CTS: Inverse CTSn input pin.
DDCD: Delta DCD - DCDn pin changed state since last read.
TERI: Trailing Edge Ring Indicator. RI input pin has changed
from low to high.
DDSR: Delta DSR - DSRn pin has changed state since last read.
DCTS: Delta CTS - CTSn pin has changed state since last read.
HDLC Register Descriptions
UART1HDLCCtrl
Address:
0x808C_020C - Read/Write
Default:
0x0000_0000
Definition:
HDLC Control Register
Bit Descriptions:
RSVD: Reserved. Unknown During Read.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD CMAS TXCM RXCM TXENC RXENC SYNC TFCEN TABEN RFCEN RILEN RFLEN RTOEN
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FLAG CRCN CRCApd IDLE AME IDLSpc CRCZ RXE TXE TUS CRCE CRCS