Cirrus Logic EP93xx - Manual (Page 711)

DS785UM1 22-23
Copyright 2007 Cirrus Logic
AC’97 Controller
EP93xx User’s Guide
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AC97SYNC
Address:
0x8088_00A4 - Read/Write
Definition:
Sync Control Register. The AC’97 Sync Controller register is a read / write
register that controls various functions within the AC’97 Controller of the
SYNC port. All the register bits are cleared to “0” when reset.
Bit Descriptions:
RSVD: Reserved. Unknown During Read.
EFORCES: Enable for Forced SYNC bit
1 - FORCEDSYNC become active
0 - FORCEDSYNC has no effect.
FORCEDSYNC: If EFORCES bit is set to “1”, the SYNC port will follow
whatever value is written to this bit. If this mechanism is
used to control the SYNC port it is up to software to
ensure that the signal is high long enough to meet the
specification of the external device.
This bit has priority over the TIMEDSYNC bit.
TIMEDSYNC: If this bit is set to “1”, the SYNC port is forced to “1” for five
pulses of the 2.9491 MHz (0.339 µs x 5 = 1.695 µs
maximum SYNC pulse and 1.356 µs minimum SYNC
pulse using this clock). After which this bit is zeroed,
allowing the SYNC to be controlled via the BITCLK
counter.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD EFORCES FORCED
SYNC
TIMED
SYNC