Cirrus Logic EP93xx - Manual (Page 669)

DS785UM1 21-13
Copyright 2007 Cirrus Logic
I 2 S Controller
EP93xx User’s Guide
2
1
2
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21
I
2
S TX Register Descriptions
I2STX0Lft
Address:
0x8082_0010 - Read/Write
Default:
0x0000_0000
Definition:
Transmit left data word for channel 0.
Bit Descriptions:
i2s_tx0_left: Transmit left data word for channel 0.
I2STX0Rt
Address:
0x8082_0014 - Read/Write
Default:
0x0000_0000
Definition:
Transmit right data word for channel 0.
Bit Descriptions:
i2s_tx0_right: Transmit right data word for channel 0.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
i2s_tx0_left
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
i2s_tx0_left
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
i2s_tx0_right
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
i2s_tx0_right