Cirrus Logic EP93xx - Manual (Page 338)

9-36 DS785UM1
Copyright 2007 Cirrus Logic
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
9
9
9
9.2.3.14 Transmit Descriptor Data/Status Flow
Figure 9-17. Transmit Descriptor Data/Status Flow
SoftWare HardWare
[CS8950 + LAN]
SoftWare
Reset
Initialize
Tx Descriptor
and Status
Queues
Write TxDEQ
with valid
descriptor count
Idle
Read Tx
Descriptors
Send Frame 0
Send Frame 1
Write TxDEQ
with valid
descriptor count
Write TxDEQ
with valid
descriptor count
Random timing between
Write TxEnq steps
Send Frame 2
Write
Tx Status
Process
Tx Status
Read Tx
Data
Read Tx
Descriptors
Read Tx
Descriptors
Read Tx
Data
Read Tx
Data
Read Tx
Data
Write
Tx Status
Write
Tx Status
Process
Tx Status
Process
Tx Status
Processor + LAN