Cirrus Logic EP93xx - Manual (Page 738)

24-6 DS785UM1
Copyright 2007 Cirrus Logic
Pulse Width Modulator
EP93xx User’s Guide
2
4
2
4
24
Default:
0x0000_0000
Definition:
PWMx Invert
Bit Descriptions:
RSVD: Reserved. Unknown During Read.
INV: Invert PWM output
0 = Output is not inverted. PWMOUT will output t
ON
first
then t
OFF
, PWMxDutyCycle controls t
ON
1 = Output is inverted. PWMOUT will output t
OFF
first then
t
ON
, PWMxDutyCycle controls t
OFF
.
PWM_INV is double buffered to allow it to be programmed
statically (PWM is stopped) or dynamically (PWM is
running).
Programmed statically, the invert takes affect after the
APB write completes and CLK_PWM is running. After the
update, CLK_PWM can be turned off without affecting
PWMOUT. In this way, the PWM output can be inverted
without enabling the PWM.
Programmed dynamically, PWM_INV is updated at the
end of a PWM cycle to prevent any output glitches or
errors. Read/write accesses to PWM_INV will read/write
its buffer.
Figure 24-1 provides an example of the effect of the
PWM_INV invert bit.
Figure 24-1. PWM_INV Example
clk_pwm
1 2 3 4 5 6 7 8 9
pwmout
PWM_INV = 0
PULSE 1 PULSE 2 PULSE 3
pwmout
PWM_INV = 1
t
on
t
off t
on
t
off Duty Cycle = t
on
/(t
on
+t
off
)
Duty Cycle = t
off
/(t
on
+t
off
)