Cirrus Logic EP93xx User Manual
Page 784
27-14
DS785UM1
Copyright 2007 Cirrus Logic
IDE Interface
EP93xx User’s Guide
2
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IDEDataIn
Address:
0x800A_0014 - Read Only
Default:
0x0000_0000
Definition:
In PIO mode read operation, this register is the Input Data Registers,
containing the register contents or the data read from the device. The register
is loaded from the DD pins at the positive edge of the DIORn signal. The
register is read only in this operation. In MDMA and UDMA data-in operations,
this register is an exact copy of the data in the input buffer to be transferred
through DMA. The register is read only in these operations. Any write to this
register is ignored.
Bit Descriptions:
IDEDD:
IDE input data in PIO read, data in input buffer in MDMA
and data at the head of input buffer in UDMA mode.
IDEMDMADataOut
Address:
0x800A_0018 - Write Only (should be written by the DMA controller only)
Default:
0x0000_0000
Definition:
In MDMA data-out operations, this register contains the data in the output
buffer to be transferred to the device. The data is written into this register by
the DMA controller. This register should only be addressed and written by the
31
30
29
28
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26
25
24
23
22
21
20
19
18
17
16
IDEDD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
IDEDD
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
IDEDD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
IDEDD