Videoattribs, Regis – Cirrus Logic EP93xx User Manual
Page 233
DS785UM1
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Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7
7
7
VideoAttribs
Address: 0x8003_0024
Default: 0x0000_0000
Definition: Video Signal Attributes register.
Bit Descriptions:
RSVD:
Reserved - Unknown during read
SDSEL:
SDRAM Selector - Read/Write
Writing to these two bits defines which SDCSn[3:0] pin is
used to access the video frame buffer in SDRAM:
00
SDCSn[0]
01
SDCSn[1]
10
SDCSn[2]
11
SDCSn[3]
SDCSn[3] is selected by default on hardware reset.
BKPXD:
Blank Pixel Data - Read/Write
Writing BKPXD = ‘1’ forces the pixel data on the P[17:0]
pins to be 0x0 when the blanking signal on the BLANK pin
is ‘0’.
0 - Disable
1 - Enable
This allows the use of an inexpensive external DAC that
does not contain data blanking logic.
DVERT:
Double Vertical - Read/Write
Writing DVERT = ‘1’ forces the values of the defined bit-
fields in the
,
,
, and
registers to be doubled
(2X programmed value) when used.
0 - Disable
1 - Enable
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
SDSEL
BKPXD
DVERT
DHORZ
EQUSER
INTRLC
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
INT
INTEN
PIFEN
CCIREN
RSVD
LCDEN
ACEN
INVCLK
BLKPOL
HSPOL
V/CPOL
CSYNC
DATEN
SYNCEN
PCLKEN
EN