Cirrus Logic EP93xx - Manual (Page 694)

22-6 DS785UM1
Copyright 2007 Cirrus Logic
AC’97 Controller
EP93xx User’s Guide
2
2
2
2
22
Register Descriptions
AC97DRx
0x8088_0030 Read AC97RISR2 Raw interrupt status register
0x8088_0034 Read AC97ISR2 Interrupt Status
0x8088_0038 Read/Write AC97IE2 Interrupt Enable
0x8088_003C - - Reserved
0x8088_0040 Read/Write AC97DR3 Data read or written from/to FIFO3.
0x8088_0044 Read/Write AC97RXCR3 Control register for receive
0x8088_0048 Read/Write AC97TXCR3 Control register for transmit
0x8088_004C Read AC97SR3 Status register
0x8088_0050 Read AC97RISR3 Raw interrupt status register
0x8088_0054 Read AC97ISR3 Interrupt Status
0x8088_0058 Read/Write AC97IE3 Interrupt Enable
0x8088_005C - - Reserved
0x8088_0060 Read/Write AC97DR4 Data read or written from/to FIFO4.
0x8088_0064 Read/Write AC97RXCR4 Control register for receive
0x8088_0068 Read/Write AC97TXCR4 Control register for transmit
0x8088_006C Read AC97SR4 Status register
0x8088_0070 Read AC97RISR4 Raw interrupt status register
0x8088_0074 Read AC97ISR4 Interrupt Status
0x8088_0078 Read/Write AC97IE4 Interrupt Enable
0x8088_007C - - Reserved
0x8088_0080 Read/Write AC97S1Data Data received/transmitted on SLOT1
0x8088_0084 Read/Write AC97S2Data Data received/transmitted on SLOT2
0x8088_0088 Read/Write AC97S12Data Data received/transmitted on SLOT12
0x8088_008C Read/Write AC97RGIS Raw Global interrupt status register
0x8088_0090 Read AC97GIS Global interrupt status register
0x8088_0094 Read/Write AC97IM Interrupt mask register
0x8088_0098 Write AC97EOI End Of Interrupt register
0x8088_009C Read/Write AC97GCR Main Control register
0x8088_00A0 Read/Write AC97Reset RESET control register.
0x8088_00A4 Read/Write AC97SYNC SYNC control register.
0x8088_00A8 Read AC97GCIS Global channel FIFO interrupt status register.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD / DATA (See Definition, below.) DATA
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DATA
Table 22-2. AC’97 Register Memory Map (Continued)
Address Type Name Description