Cirrus Logic EP93xx User Manual
Page 707
DS785UM1
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Copyright 2007 Cirrus Logic
AC’97 Controller
EP93xx User’s Guide
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2
2
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22
AC97GIS
Address:
0x8088_0090 - Read Only
Definition:
Global Interrupt Status. The AC97GIS register is the global interrupt status
register. All bits are cleared to zero on reset. Each bit is the logical AND of the
corresponding bits in the AC97RGIS register and the AC97IM register.
Bit Descriptions:
RSVD:
Reserved. Unknown During Read.
SLOT2TXCOMPLETE:If this bit is set to “1”, the SLOT2TXCOMPLETE
interrupt is asserted.
CODECREADY:
This bit is set to “1” during a wakeup when the codec
indicates that it is ready by setting bit 15 of Slot0
WINT:
Wake-up Interrupt Status: If this bit is set to “1”, the Wake-
up Interrupt is asserted.
GPIOINT:
GPIO Interrupt Status: If this bit is set to “1”, the GPIOINT
interrupt is asserted.
GPIOTXCOMPLETE:If this bit is set to “1”, the GPIOTXCOMPLETE interrupt
is asserted.
SLOT2RXVALID: If this bit is set to “1”, SLOT2RXVALID interrupt is
asserted.
SLOT1TXCOMPLETE:If this bit is set to “1”, SLOT1TXCOMPLETE interrupt is
asserted.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RSVD
SLOT2TX
COMPLETE
CODEC
READY
WINT
GPIO
INT
GPIOTX
COMPLETE
SLOT2R
XVALID
SLOT1TX
COMPLETE