Cirrus Logic EP93xx - Manual (Page 725)

DS785UM1 23-13
Copyright 2007 Cirrus Logic
Synchronous Serial Port
EP93xx User’s Guide
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23
23.6 Registers
The SSP registers are shown in the following table.
Register Descriptions
SSPCR0
Address:
0x808A_0000 - Read/Write
Default:
0x0000_0000
Definition:
SSPCR0 is the control register 0 and contains four different bit fields, which
control various functions within the SSP.
Bit Descriptions:
RSVD: Reserved. Unknown During Read.
Table 23-1. SSP Register Memory Map Description
Address Type Width
Reset
value
Name Description
0x808A_0000 Read/write 16 0x0000 SSPCR0 Control register 0.
0x808A_0004 Read/write 8 0x00 SSPCR1 Control register 1.
0x808A_0008 Read/write 16 0x0000 SSPDR
Receive FIFO (Read)/
Transmit FIFO data
register (Write).
0x808A_000C Read 7 0x00 SSPSR Status register.
0x808A_0010 Read/write 8 0x00 SSPCPSR Clock prescale register.
0x808A_0014 Read 3 0x0
SSPIIR/
SSPICR
Interrupt identification
register (read)
Interrupt clear register
(write).
0x808A_0018 - 0x808A_003C - - - - Reserved
0x808A_0094 - 0x808A_00FF - - - - Reserved
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RSVD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SCR SPH SPO FRF DSS