Cirrus Logic EP93xx - Manual (Page 102)

3-32 DS785UM1
Copyright 2007 Cirrus Logic
MaverickCrunch Co-Processor
EP93xx User’s Guide
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Convert Single Precision Floating Point to Double Precision Floating Point
Description:
Converts a single precision floating point value to a double precision floating
point value.
Mnemonic:
CFCVTSD CRd, CRn
Bit Definitions
CRd: Destination register
CRn: Source register
Convert Double Precision Floating Point to Single Precision Floating Point
Description:
Converts a double precision floating point value to a single precision floating
point value.
Mnemonic:
CFCVTDS CRd, CRn
Bit Definitions:
CRd: Destination register
CRn: Source register
Convert 32-bit Integer to Single Precision Floating Point
Description:
Converts a 32-bit integer to a single precision floating point value.
Mnemonic:
CFCVT32S CRd, CRn
Bit Definitions:
CRd: Destination register
CRn: Source register
31:28 27:24 23:22 21:20 19:16 15:12 11:8 7:5 4 3:0
cond 1 1 1 0 0 0 0 0 CRn CRd 0 1 0 0 0 1 1 0 CRm
31:28 27:24 23:22 21:20 19:16 15:12 11:8 7:5 4 3:0
cond 1 1 1 0 0 0 0 0 CRn CRd 0 1 0 0 0 1 0 0 CRm
31:28 27:24 23:22 21:20 19:16 15:12 11:8 7:5 4 3:0
cond 1 1 1 0 0 0 0 0 CRn CRd 0 1 0 0 1 0 0 0 CRm